| 零件编号 | 下载&订购 | 功能描述 | 制造商&上传企业 | LOGO |
|---|---|---|---|---|
74LVC74A | Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc | PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦 | Philips | |
74LVC74A | Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半导体公司 | nxp | |
74LVC74A | Dual D-type flip-flop with set and reset; positive-edge trigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | |
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半导体公司 | nxp | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74A-Q100isadualedgetriggeredD-typeflip-flop.Ithasindividualdata(nD)inputs,clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockin | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc | PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦 | Philips | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半导体公司 | nxp | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc | PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦 | Philips | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半导体公司 | nxp | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74A-Q100isadualedgetriggeredD-typeflip-flop.Ithasindividualdata(nD)inputs,clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockin | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc | PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦 | Philips | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(D)inputs,clock(CP)inputs,set(SD)and(RD)inputs,andcomplementaryQandQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockinput.Informati | nxpNXP Semiconductors 恩智浦恩智浦半导体公司 | nxp | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1.Generaldescription The74LVC74AisadualedgetriggeredD-typeflip-flopwithindividualdata(nD)inputs,clock(nCP) inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The74LVC74Aisahigh-performance,low-voltageSi-gateCMOSdeviceandsuperiortomostadvancedCMOScompatibleTTLfamilies. FEATURES •Widesupplyvoltagerangeof1.2Vto3.6V •InaccordancewithJEDECstandardno.8-1A. •Inputsacceptvoltagesupto5.5V •CMOSlowpowerc | PhilipsROYAL PHILIPS 飞利浦荷兰皇家飞利浦 | Philips | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74A-Q100isadualedgetriggeredD-typeflip-flop.Ithasindividualdata(nD)inputs,clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockin | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
Dual D-type flip-flop with set and reset; positive-edge trigger Generaldescription The74LVC74A-Q100isadualedgetriggeredD-typeflip-flop.Ithasindividualdata(nD)inputs,clock(nCP)inputs,set(nSD)and(nRD)inputs,andcomplementarynQandnQoutputs. ThesetandresetareasynchronousactiveLOWinputsandoperateindependentlyoftheclockin | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 封装/外壳：14-VFQFN 裸露焊盘 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14DHVQFN | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA | ||
包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SO | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | NEXPERIA |
详细参数
- 型号：
74LVC74A
- 制造商：
NXP Semiconductors
- 功能描述：
IC DUAL D F-F POS EDGE DHVQFN14
- 功能描述：
IC, DUAL, D F-F POS EDGE, DHVQFN14
- 功能描述：
IC, DUAL, D F-F POS EDGE, DHVQFN14, Flip-Flop
- Type：
D, Propagation
- Delay：
2.5ns, S
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
02+ |
TSSOP小 |
3300 |
全新原装现货100真实自己公司 |
询价 | ||
PHILIPS |
22+ |
TSSOP14 |
3480 |
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙ |
询价 | ||
TI |
2017+ |
SOP |
54785 |
深圳代理原装现货进口库存(香港-日本-台湾)开17点增票 |
询价 | ||
TI |
03+ |
SOP |
4485 |
原装现货!低价支持实单!贵了给接受价格! |
询价 | ||
NXP |
2020+ |
TSSOP14 |
901 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
询价 | ||
PHILIPS |
23+ |
TSSOP14 |
5000 |
原装现货,优势热卖 |
询价 | ||
PHILIPS |
22+ |
SOP |
3500 |
原装现货,可开13%税票 |
询价 | ||
SOP14 |
84 |
询价 | |||||
PHILIPS |
2339+ |
TSSOP14 |
21322 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
询价 | ||
TI |
SOP |
17432 |
提供BOM表配单只做原装货值得信赖 |
询价 |
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- 74LVCH162374APAG8
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- 74LVCH16244APAG
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