Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC573A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as

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PHI

PHI

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC573A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A Latch Enable (LE) input and an Output Enable (OE) input are common to all internal latches.\n When LE is HIGH, data at the Dn input • 5 V tolerant inputs/outputs, for interfacing with 5 V logic\n• Supply voltage range from 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• High-impedance when VCC = 0 V\n• Flow-through pinout architecture\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 ;

Nexperia

安世

Package：20-SSOP（0.209"，5.30mm 宽）；包装：管件 类别：集成电路（IC） 锁存器 描述：IC OCTAL D TRANSP LATCH 20SSOP

Nexperia USA Inc.

Package：20-SSOP（0.209"，5.30mm 宽）；包装：管件 类别：集成电路（IC） 锁存器 描述：IC OCTAL D TRANSP LATCH 20SSOP

Nexperia USA Inc.