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74LVC3G17DP

Triple non-inverting Schmitt trigger with 5 V tolerant input

General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

文件:91.4 Kbytes 页数:16 Pages

PHI

PHI

PHI

74LVC3G17DP

Triple non-inverting Schmitt trigger with 5 V tolerant input

General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

文件:109.61 Kbytes 页数:18 Pages

恩XP

恩XP

74LVC3G17DP

丝印:V17;Package:SOT505-2;Triple non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC3G17 is a triple buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down app

文件:278.61 Kbytes 页数:17 Pages

NEXPERIA

安世

74LVC3G17DP-Q100

丝印:V17;Package:TSSOP8;Triple non-inverting Schmitt trigger with 5 V tolerant input

文件:219.97 Kbytes 页数:12 Pages

NEXPERIA

安世

74LVC3G17DP

Triple non-inverting Schmitt trigger with 5 V tolerant input

The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G17 as a t • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant input/output for interfacing with 5 V logic\n• High noise immunity\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• ±24 mA output drive (VCC = 3.0 V)\n• CMOS low-power consumption\n• Latch-up p;

Nexperia

安世

74LVC3G17DP-Q100

Triple non-inverting Schmitt trigger with 5 V tolerant input

The 74LVC3G17-Q100 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G17-Q • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant input/output for interfacing with 5 V logic\n• High noise immunity\n• ESD protection:• MIL-STD-883,;

Nexperia

安世

74LVC3G17DP,125

Package:8-TSSOP,8-MSOP(0.118",3.00mm 宽);包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 类别:集成电路(IC) 缓冲器,驱动器,接收器,收发器 描述:IC BUF NON-INVERT 5.5V 8TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

74LVC3G17DP-Q100H

Package:8-TSSOP,8-MSOP(0.118",3.00mm 宽);包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 类别:集成电路(IC) 缓冲器,驱动器,接收器,收发器 描述:IC BUF NON-INVERT 5.5V 8TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

技术参数

  • VCC (V):

    1.65 - 5.5

  • Logic switching levels:

    CMOS/LVTTL

  • Output drive capability (mA):

    ± 32

  • fmax (MHz):

    175

  • Nr of bits:

    3

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    217

  • Rth(j-c) (K/W):

    106

  • Package name:

    TSSOP8

供应商型号品牌批号封装库存备注价格
恩XP
24+
标准封装
11048
全新原装正品/价格优惠/质量保障
询价
恩XP
2024+
N/A
70000
柒号只做原装 现货价秒杀全网
询价
恩XP
1534
TSSOP8
958
原装现货 价格优势
询价
恩XP
23+
N/A
12000
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
恩XP
25+
N/A
21000
原装正品现货,原厂订货,可支持含税原型号开票。
询价
NEXPERIA
22+
原厂
9600
询价
恩XP
2016+
TSSOP8
3000
只做原装,假一罚十,公司可开17%增值税发票!
询价
恩XP
23+
NA
8486
专做原装正品,假一罚百!
询价
恩XP
25+23+
TSSOP8
6851
绝对原装正品全新进口深圳现货
询价
恩XP
18+
TSSOP
85600
保证进口原装可开17%增值税发票
询价
更多74LVC3G17DP供应商 更新时间2026-2-3 22:59:00