丝印：Y4；Package：SOT1203；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

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NEXPERIA

安世

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables th • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V)\n• ±24 mA output drive (VCC = 3.0 V)\n• HBM JESD22-A114F exceeds 2000 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Multiple package optio;

Nexperia

安世

Package：8-XFDFN；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 8XSON

Nexperia USA Inc.

Single D-type flip-flop with set and reset; positive edge trigger

文件：100.55 Kbytes 页数：20 Pages

PHI

飞利浦