74LVC273PW-Q100

Octal D-type flip-flop with reset; positive-edge trigger; • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Wide supply voltage range from 1.2 V to 3.6 V\n• Inputs accept voltages up to 5.5 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Output drive capability 50 Ω transmission lines at +85 °C\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 V)\n• JESD8-5A (2.3 V to 2.7 V)\n• JESD8-C/JESD36 (2.7 V to 3.6 V)\n\n• ESD protection:• MIL-STD-883, method 3015 exceeds 2000 V\n• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n;

The 74LVC273-Q100 has eight edge-triggered, D-type flip-flops with individual Dn inputs and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs are forced LOW independent of clock or data inputs by a LOW voltage level on the MR input.\n The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74LVC273PW-Q100

Octal D-type flip-flop with reset; positive-edge trigger

74LVC273PW-Q100J

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 功能：主复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

74LVC2G08DC

NEXPERIA
原厂

74LVC2G125DCTRE6

Texas Instruments
NA

Texas Instruments