2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC1G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.

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PHI

PHI

2-input EXCLUSIVE-OR gate

description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. T

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恩XP

丝印：V86；Package：SOT753；2-input EXCLUSIVE-OR gate

1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using I

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NEXPERIA

安世

丝印：V86；Package：SC-74A；2-input EXCLUSIVE-OR gate

1. General description The 74LVC1G86-Q100 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications us

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NEXPERIA

安世

丝印：V86；Package：SC-74A；2-input EXCLUSIVE-OR gate

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NEXPERIA

安世

2-input EXCLUSIVE-OR gate

The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function.\n Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial Power-down applications using IOFF. The IOFF circu • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8B/JESD36 (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• ±24 mA outpu;

Nexperia

安世

2-input EXCLUSIVE-OR gate

The 74LVC1G86‑Q100 provides the 2‑input EXCLUSIVE‑OR function.\n Inputs can be driven from either 3.3V or 5V devices. These features allow the use of these devices in a mixed 3.3V and 5V environment.\n This device is fully specified for partial Power-down applications using IOFF. The IOFF circ • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD;

Nexperia

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Package：SC-74A，SOT-753；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 门和反相器 描述：IC GATE XOR 1CH 2-INP SC74A

Nexperia USA Inc.

Package：SC-74A，SOT-753；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE XOR 1CH 2-INP SC74A

Nexperia USA Inc.