Bilateral switch

General description The 74LVC1G384 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC1G384 provides one single pole, single throw analog switch function. It has two input/output terminals (Yand Z) and an active LOW enable input pin (E). When pin E is HIGH, the analog swit

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恩XP

SINGLE-CHANNEL 6Q SPST Analog Switches

Features » Low On-resistance, Ron=60 + 1.8V Logic Compatible Control Pin « Overrides VCC to Achieve True Isolation Even When Supply Is Dead » High OffIsolation: -100dB @ 100KHz » Low Channel-to-Channel Crosstalk: -97dB @ 100KHz » High Bandwidth (-3dB @400MHz) Suitable For USB2

文件：2.58038 Mbytes 页数：5 Pages

TECHPUBLIC

台舟电子

丝印：YL；Package：SOT353-1；Bilateral switch

1. General description The 74LVC1G384 is a single pole, single throw analog switch. It has two input/output terminals (Y and Z) and an enable pin (E). When E is HIGH, the analog switch is turned off. Control inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of t

文件：332.33 Kbytes 页数：23 Pages

NEXPERIA

安世

Bilateral switch

General description The 74LVC1G384 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC1G384 provides one single pole, single throw analog switch function. It has two input/output terminals (Yand Z) and an active LOW enable input pin (E). When pin E is HIGH, the analog swit

文件：126.26 Kbytes 页数：22 Pages

恩XP

丝印：YL；Package：SOT1226-3；Bilateral switch

1. General description The 74LVC1G384 is a single pole, single throw analog switch. It has two input/output terminals (Y and Z) and an enable pin (E). When E is HIGH, the analog switch is turned off. Control inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of t

文件：332.33 Kbytes 页数：23 Pages

NEXPERIA

安世

3-input EXCLUSIVE-OR gate

1. General description The 74LVC1G386 is a single 3-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant o

文件：215.52 Kbytes 页数：12 Pages

NEXPERIA

安世

3-input EXCLUSIVE-OR gate

General description The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

文件：71.79 Kbytes 页数：12 Pages

恩XP

3-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. FEATURE

文件：74.85 Kbytes 页数：15 Pages

PHI

PHI

Single 3-Input Positive-XOR Gate

1FEATURES 2• Available in the Texas Instruments NanoStar ™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to VCC • I off Supports Live Insertion, Partial-Power- Down Mode, Back-Drive Protection • Latch-Up Performance Excee

文件：1.73058 Mbytes 页数：29 Pages

TI

德州仪器

丝印：C8R；Package：SC70(DCK)；Single 3-Input Positive-XOR Gate

1FEATURES 2• Available in the Texas Instruments NanoStar ™ and NanoFree™ Packages • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to VCC • I off Supports Live Insertion, Partial-Power- Down Mode, Back-Drive Protection • Latch-Up Performance Excee

文件：1.73253 Mbytes 页数：29 Pages

TI

德州仪器