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74LVC1G11GW

Single 3-input AND gate

General description The 74LVC1G11 is a high-performance, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This d

文件:71.4 Kbytes 页数:14 Pages

PHI

飞利浦

PHI

74LVC1G11GW

Single 3-input AND gate

General description The 74LVC1G11 is a high-performance, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This d

文件:195.35 Kbytes 页数:17 Pages

PHI

飞利浦

PHI

74LVC1G11GW

Single 3-input AND gate

General description The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input

文件:84.79 Kbytes 页数:14 Pages

恩XP

恩XP

74LVC1G11GW

丝印:VU;Package:SOT363-2;Single 3-input AND gate

1. General description The 74LVC1G11 is a single 3-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower i

文件:261.399 Kbytes 页数:16 Pages

NEXPERIA

安世

74LVC1G11GW-Q100

丝印:VU;Package:SC-88;Single 3-input AND gate

文件:777.07 Kbytes 页数:13 Pages

NEXPERIA

安世

74LVC1G11GW

Single 3-input AND gate

The 74LVC1G11 provides a single 3-input AND gate.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V)\n\n• ±24 mA output drive (VCC = 3.0 V)\n• ESD prot;

Nexperia

安世

74LVC1G11GW-Q100

Single 3-input AND gate

The 74LVC1G11-Q100 provides a single 3-input AND gate.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n Schmitt trigger action at all inputs makes the circuit highly tolerant to slower input rise and • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD;

Nexperia

安世

74LVC1G11GW,125

Package:6-TSSOP,SC-88,SOT-363;包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 类别:集成电路(IC) 门和反相器 描述:IC GATE AND 1CH 3-INP 6TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

74LVC1G11GW-Q100H

Package:6-TSSOP,SC-88,SOT-363;包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 类别:集成电路(IC) 门和反相器 描述:IC GATE AND 1CH 3-INP 6TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

技术参数

  • VCC (V):

    1.65 - 5.5

  • Logic switching levels:

    CMOS/LVTTL

  • Output drive capability (mA):

    ± 32

  • tpd (ns):

    2.6

  • fmax (MHz):

    175

  • Nr of bits:

    1

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    284

  • Ψth(j-top) (K/W):

    56.7

  • Rth(j-c) (K/W):

    172

  • Package name:

    TSSOP6

供应商型号品牌批号封装库存备注价格
恩XP
24+
NA
18524
原装正品,现货库存,1小时内发货
询价
NEXPERIA
21+
SOT363
60000
全新原装公司现货
询价
恩XP
2021+
NA
12000
勤思达 只做原装正品 现货供应
询价
恩XP
23+
NA
18000
正规渠道,只有原装!
询价
恩XP
22+
SOT363
45000
原装正品
询价
TI
25+
SOT363
6000
全新原装现货、诚信经营!
询价
恩XP
2021+
NA
9000
原装现货,随时欢迎询价
询价
恩XP
21+
NA
12000
全新原装
询价
恩XP
18+
NA
120000
询价
恩XP
2024+
N/A
70000
柒号只做原装 现货价秒杀全网
询价
更多74LVC1G11GW供应商 更新时间2025-11-20 23:00:00