丝印：VB；Package：SOT1115；Single 2-input NOR gate

1. General description The 74LVC1G02 is a single 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：255.89 Kbytes 页数：16 Pages

NEXPERIA

安世

Single 2-input NOR gate

The 74LVC1G02 provides the single 2-input NOR function.\n Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.\n Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall t • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V)\n\n• ±24 mA output drive (VCC = 3.0 V)\n• CMOS low power consumption\n• Latch-up performance exceeds 250;

Nexperia

安世

Package：6-XFDFN；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NOR 1CH 2-INP 6XSON

Nexperia USA Inc.

Single 2-input NOR gate

1. General description The 74LVC1G02 is a single 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：255.89 Kbytes 页数：16 Pages

NEXPERIA

安世

Single 2-input NOR gate

DESCRIPTION The 74LVC1G02 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt

文件：85.76 Kbytes 页数：14 Pages

PHI

PHI