Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

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PHI

74LVC02: Low Voltage CMOS Quad 2-Input NOR Gate

The 74LVC02A is a high performance, quad 2-input NOR gate operating from a 1.2V to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. AVI specification of 5.5V allows 74LVC02 Designed for 1.2 V to 3.6 V VCC Operation\n5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic\n24 mA Output Sink and Source Capability\nNear Zero Static Supply Current (10 µA) Substantially Reduces System Power Requirements\nLatchup Performance Exceeds 250 mA\nESD Performance: Human Body ;

ONSEMI

安森美半导体

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

文件：88.29 Kbytes 页数：10 Pages

PHI

PHI

Low-Voltage CMOS Quad 2-Input NAND Gate

Low-Voltage CMOS Quad 2-Input NOR Gate With 5 V−Tolerant Inputs The 74LVC02A is a high performance, quad 2−input NOR gate operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved s

文件：95.12 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Quad 2-input NOR gate

1. General description The 74LVC02A is a quad-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

文件：232.44 Kbytes 页数：12 Pages

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安世

Quad 2-input NOR gate

General description The 74LVC02A provides four 2-input NOR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Features and benefits ■ 5 V tolerant inputs for interfacing with 5 V logic

文件：164.78 Kbytes 页数：14 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74LVC02A is a quad-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

文件：232.44 Kbytes 页数：12 Pages

NEXPERIA

安世

Quad 2-input NOR gate

General description The 74LVC02A-Q100 provides four 2-input NOR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. This product has been qualified to the Automotive Electronics Council (A

文件：746.35 Kbytes 页数：14 Pages

NEXPERIA

安世

Quad 2-input NOR gate

1. General description The 74LVC02A is a quad-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

文件：232.44 Kbytes 页数：12 Pages

NEXPERIA

安世

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

文件：88.29 Kbytes 页数：10 Pages

PHI

PHI