Quad bilateral switches

DESCRIPTION The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT4066. FEATURES • Optimized for Low Voltage applications: 1.0V to 6.0V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce)

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PHI

PHI

Quad bilateral switches

1. General description The 74LV4066 is a quad single pole, single throw analog switch. Each switch features two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Digital inputs include clamp diodes. This enables the use of

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Quad bilateral switches

1. General description The 74LV4066 is a quad single pole, single throw analog switch. Each switch features two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Digital inputs include clamp diodes. This enables the use of

文件：315.75 Kbytes 页数：21 Pages

NEXPERIA

安世

Quad bilateral switches

DESCRIPTION The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT4066. FEATURES • Optimized for Low Voltage applications: 1.0V to 6.0V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce)

文件：84.2 Kbytes 页数：10 Pages

PHI

PHI

Quad bilateral switches

The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible with the 74HC4066 and 74HCT4066.\n The 74LV4066 has four independent switches. Each switch has two input/output pins (nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding analog swi • Optimized for low-voltage applications: 1.0 V to 3.6 V\n• Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Very low ON-resistance:• 60 Ω (typical) at VCC = 2.0 V\n• 35 Ω (typical) at VCC = 3.0 V\n• 25 Ω ;

Nexperia

安世

Quad bilateral switches

The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible with the 74HC4066 and 74HCT4066.\n The 74LV4066 has four independent switches. Each switch has two input/output pins (nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding analog swi • Optimized for low-voltage applications: 1.0 V to 3.6 V\n• Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Very low ON-resistance:• 60 Ω (typical) at VCC = 2.0 V\n• 35 Ω (typical) at VCC = 3.0 V\n• 25 Ω ;

Nexperia

安世