Quad 2-input NAND gate

DESCRIPTION The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT00. The 74LV00 provides the 2-input NAND function. FEATURES •Wide operating voltage: 1.0 to 5.5 V •Optimized for low voltage applications: 1.0 to 3.6 V •Accepts TTL inpu

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Quad 2-input NAND gate

1. General description The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • Wide supply voltage range from 1.0 to 5.5 V • CMOS low power dissipation •

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Quad 2-input NAND gate

DESCRIPTION The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT00. The 74LV00 provides the 2-input NAND function. FEATURES •Wide operating voltage: 1.0 to 5.5 V •Optimized for low voltage applications: 1.0 to 3.6 V •Accepts TTL inpu

文件：104.51 Kbytes 页数：10 Pages

PHI

PHI

Quad 2-input NAND gate

The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00.\n The 74LV00 provides a quad 2-input NAND function. • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V;

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Quad 2-input NAND gate

The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00.\n The 74LV00 provides a quad 2-input NAND function. • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V;

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Quad 2-input NAND gate

The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in

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安世

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14SO

Nexperia USA Inc.

Package：14-SSOP（0.209"，5.30mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14SSOP

Nexperia USA Inc.

Package：14-SSOP（0.209"，5.30mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14SSOP

Nexperia USA Inc.