8-bit shift register with output register

1. General description The 74HC594; 74HCT594 is an 8-bit serial-in/serial or parallel-out shift register with a storage register. Separate clock and reset inputs are provided on both shift and storage registers. The device features a serial input (DS) and a serial output (Q7S) to enable cascadi

文件：347.07 Kbytes 页数：23 Pages

NEXPERIA

安世

8-bit shift register with output register

The 74HC594; 74HCT594 is an 8-bit serial-in/serial or parallel-out shift register with a storage register. Separate clock and reset inputs are provided on both shift and storage registers. The device features a serial input (DS) and a serial output (Q7S) to enable cascading. Data is shifted on the L • Synchronous serial input and output\n• 8-bit parallel output\n• Shift and storage registers have independent direct clear and clocks\n• Independent clocks for shift and storage registers\n• 100 MHz (typical)\n• Wide supply voltage range from 2.0 V to 6.0 V\n• CMOS low power dissipation\n• High noi;

Nexperia

安世

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：串行至并行，串行 类别：集成电路（IC） 移位寄存器 描述：IC 8BIT SHIFT REGISTER 16TSSOP

Nexperia USA Inc.

8-bit shift register with output register

DESCRIPTION The 74HC/HCT594 are high-speed, Si-gate CMOS devices, and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • Synchronous serial input and output • 8-bit parallel output • Shift and storage reg

文件：71.22 Kbytes 页数：10 Pages

PHI

飞利浦

8-bit shift register with output register

DESCRIPTION The 74HC/HCT594 are high-speed, Si-gate CMOS devices, and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • Synchronous serial input and output • 8-bit parallel output • Shift and storage reg

文件：71.22 Kbytes 页数：10 Pages

PHI

飞利浦