Triple 2-channel analog multiplexer/demultiplexer

1. General description The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a comm

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NEXPERIA

安世

Triple 2-channel analog multiplexer/demultiplexer

The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). A digi • Wide analog input voltage range from -5 V to +5 V\n• CMOS low power dissipation\n• High noise immunity\n• Latch-up performance exceeds 100 mA per JESD78 Class II Level B\n• Complies with JEDEC standard:• JESD8C (2.7 V to 3.6 V)\n• JESD7A (2.0 V to 6.0 V)\n\n• Low ON resistance:• 80 Ω (typical) at ;

Nexperia

安世

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.

文件：176.73 Kbytes 页数：33 Pages

PHI

PHI

Triple 2-channel analog multiplexer/demultiplexer

文件：141.2 Kbytes 页数：17 Pages

PHI

PHI

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.

文件：176.73 Kbytes 页数：33 Pages

PHI

PHI