74HCT4046AD数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A.

特性 Features

• Low power consumption
• VCO-Inhibit control for ON/OFF keying and for low standby power consumption
• Centre frequency of up to 17 MHz (typical) at VCC = 4.5 V
• Choice of three phase comparators:
• PC1: EXCLUSIVE-OR
• PC2: Edge-triggered JK flip-flop
• PC3: Edge-triggered RS flip-flop

• Excellent Voltage Controlled Oscillator (VCO) frequency linearity
• VCO-inhibit control for ON/OFF keying and for low standby power consumption
• Low frequency drift with supply voltage and temperature variations
• Operating power supply voltage range:
• VCO section 3.0 V to 6.0 V
• Digital section 2.0 V to 6.0 V

• Zero voltage offset due to operational amplifier buffering
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V

应用 Application

• FM modulation and demodulation
• Frequency synthesis and multiplication
• Frequency discrimination
• Tone decoding
• Data synchronization and conditioning
• Voltage-to-frequency conversion
• Motor-speed control