14-stage binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT4020 are high-speed Si-gate CMOS devices and are pin compatible with the “4020” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI

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14-stage binary ripple counter

1. General description The 74HC4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all

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14-stage binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT4020 are high-speed Si-gate CMOS devices and are pin compatible with the “4020” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI

文件：49.93 Kbytes 页数：7 Pages

PHI

飞利浦

14-stage binary ripple counter

1. General description The 74HC4020-Q100; 74HCT4020-Q100 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR

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14-stage binary ripple counter

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14-stage binary ripple counter

The 74HT4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces al • Wide supply voltage range from 2.0 V to 6.0 V\n• Input levels:• For 74HC4020: CMOS level\n• For 74HCT4020: TTL level\n\n• Multiple package options\n• Complies with JEDEC standard no. 7A\n• Specified from -40 °C to +85 °C and from -40 °C to +125 °C;

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74HCT4020DB - 14-stage binary ripple counter

14-stage binary ripple counter - The 74HT4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears ·Wide supply voltage range from 2.0 V to 6.0 V\n·Input levels:·For 74HC4020: CMOS level\n·For 74HCT4020: TTL level;

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14-stage binary ripple counter

The 74HC4020-Q100; 74HCT4020-Q100 are 14-stage binary ripple counters with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH‑to‑LOW transition of CP. A HIGH on MR clears all counter stages and • Automotive product qualification in accordance with AEC‑Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC4020-Q100: CMOS level\n• For 74HCT4020-Q100: TTL level\n\n• Complies with JEDEC standard no. 7A\n• ESD protection:• MIL-STD-883, method 3015 ex;

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Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 计数器，除法器 描述：IC 14STAGE BINARY RIPPLE 16SOIC

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Package：16-SSOP（0.209"，5.30mm 宽）；包装：管件 类别：集成电路（IC） 计数器，除法器 描述：IC 14STAGE BINARY RIPPLE 16-SSOP

Nexperia USA Inc.