Triple Buffer Gate

DESCRIPTION The 74HC3G/HCT3G34 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). Specified in compliance with JEDEC standard no. 7. The 74HC3G/HCT3G34 provides three buffers. FEATURES • Wide supply voltage range from 2.0 to 6.0 V • Symmetrical outp

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PHI

PHI

Triple buffer gate

General description The 74HC3G34; 74HCT3G34 are high-speed Si-gate CMOS devices. They provide three buffer gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V. The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. Features

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恩XP

丝印：U34；Package：SOT765-1；Triple buffer gate

1 General description The 74HC3G34; 74HCT3G34 is a triple buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2 Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Input levels: – For 74

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NEXPERIA

安世

丝印：U34；Package：SOT765-1；Triple buffer gate

1 General description The 74HC3G34-Q100; 74HCT3G34-Q100 is a triple buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q1

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NEXPERIA

安世

丝印：U34；Package：VSSOP8；Triple buffer gate

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NEXPERIA

安世

Triple buffer gate

The 74HC3G34; 74HCT3G34 is a triple buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. • Wide supply voltage range from 2.0 V to 6.0 V\n• Input levels:• For 74HC3G34: CMOS level\n• For 74HCT3G34: TTL level\n\n• Complies with JEDEC standard no. 7 A\n• Symmetrical output impedance\n• High noise immunity\n• Low-power dissipation\n• Balanced propagation delays\n• Multiple package options\;

Nexperia

安世

Dual non-inverting Schmitt trigger

The 74HC3G34-Q100; 74HCT3G34-Q100 are triple buffers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suit • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC3G34-Q100: CMOS level\n• For 74HCT3G34-Q100: TTL level\n\n• Wide supply voltage range from 2.0 V to 6.0 V\n• Symmetrical output impedance\n;

Nexperia

安世

Package：8-VFSOP（0.091"，2.30mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 8VSSOP

Nexperia USA Inc.

Package：8-VFSOP（0.091"，2.30mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 8VSSOP

Nexperia USA Inc.