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74HCT238D

3-to-8 line decoder/demultiplexer

General description 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (

文件:120.28 Kbytes 页数:18 Pages

恩XP

恩XP

74HCT238D

3-to-8 line decoder/demultiplexer

1. General description The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple e

文件:267.32 Kbytes 页数:15 Pages

NEXPERIA

安世

74HCT238D

3-to-8 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for mem

文件:49.61 Kbytes 页数:7 Pages

PHI

飞利浦

PHI

74HCT238DB

3-to-8 line decoder/demultiplexer

General description 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (

文件:120.28 Kbytes 页数:18 Pages

恩XP

恩XP

74HCT238DB

3-to-8 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for mem

文件:49.61 Kbytes 页数:7 Pages

PHI

飞利浦

PHI

74HCT238D-Q100

3-to-8 line decoder/demultiplexer

1. General description The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This

文件:255.08 Kbytes 页数:15 Pages

NEXPERIA

安世

74HCT238D-Q100

3-to-8 line decoder/demultiplexer

文件:244.46 Kbytes 页数:17 Pages

NEXPERIA

安世

74HCT238D

3-to-8 line decoder/demultiplexer

The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy p • Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Active HIGH mutually exclusive outputs\n• Multiple package options\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC238: CMOS level\n• For 74HCT238: TTL level\n\n• ESD ;

Nexperia

安世

74HCT238DB

3-to-8 line decoder/demultiplexer

The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy p • Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Active HIGH mutually exclusive outputs\n• Multiple package options\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC238: CMOS level\n• For 74HCT238: TTL level\n\n• ESD ;

Nexperia

安世

74HCT238D-Q100

3-to-8 line decoder/demultiplexer

The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function all • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Active HIGH mutually exclusive outputs\n• Multip;

Nexperia

安世

技术参数

  • VCC (V):

    4.5 - 5.5

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 4

  • tpd (ns):

    18

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    93

  • Ψth(j-top) (K/W):

    10.0

  • Rth(j-c) (K/W):

    53

  • Package name:

    SO16

供应商型号品牌批号封装库存备注价格
恩XP
24+
标准封装
45048
全新原装正品/价格优惠/质量保障
询价
NEXPERIA/安世
25+
SOP16
600000
NEXPERIA/安世全新特价74HCT238D即刻询购立享优惠#长期有排单订
询价
NEXPERIA/安世
21+
SOP16
8080
只做原装,质量保证
询价
恩XP
2024+
N/A
70000
柒号只做原装 现货价秒杀全网
询价
恩XP
23+
N/A
12000
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
恩XP
25+
SOP-16
3043
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
24+
5000
公司存货
询价
PHI
24+/25+
2049
原装正品现货库存价优
询价
恩XP
24+
N/A
25843
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
ph
24+
N/A
6980
原装现货,可开13%税票
询价
更多74HCT238D供应商 更新时间2025-12-16 9:38:00