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74HCT109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

1.Generaldescription The74HC109-Q100;74HCT109-Q100isadualpositiveedgetriggeredJKflip-flopfeaturing individualnJandnKinputs.Ithasclock(nCP)inputs,set(nSD)andreset(nRD)inputsand complementarynQandnQoutputs.ThesetandresetareasynchronousactiveLOWinputsand

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger; • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC109-Q100: CMOS level\n• For 74HCT109-Q100: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mode\n• Specified in compliance with JEDEC standard no. 7A\n• ESD protection:• MIL-STD-883, method 3015 exceeds 2000 V\n• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n;

The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The nJ and nK inputs control the state changes of the flip-flops as described in the mode select function table. The nJ and nK inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the nJ and nK inputs together. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

NexperiaNexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT109D-Q100J

Package:16-SOIC(0.154",3.90mm 宽);包装:管件 功能:设置(预设)和复位 类别:集成电路(IC) 触发器 描述:IC FF JK TYPE DUAL 1BIT 16SO

ETC

ETC

技术参数

  • VCC (V):

    4.5 - 5.5

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 4

  • tpd (ns):

    17

  • fmax (MHz):

    61

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    86

  • Ψth(j-top) (K/W):

    6.6

  • Rth(j-c) (K/W):

    44

  • Package name:

    SO16

供应商型号品牌批号封装库存备注价格
Nexperia USA Inc.
24+
16-SOIC(0.154
56300
询价
Nexperia(安世)
2021+
SO-16
499
询价
Nexperia(安世)
22+
NA
500000
万三科技,秉承原装,购芯无忧
询价
Nexperia
2022+
原厂原包装
8600
全新原装 支持表配单 中国著名电子元器件独立分销
询价
Nexperia(安世)
24+
SOP16
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
询价
Nexperia(安世)
24+
SOP16
3238
原装现货,免费供样,技术支持,原厂对接
询价
24+
N/A
70000
一级代理-主营优势-实惠价格-不悔选择
询价
Nexperia USA Inc.
25+
16-SO
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证
询价
PHI
1922+
SOP16-3.9MM
12600
询价
HAR
24+
DIP
225
询价
更多74HCT109D-Q100供应商 更新时间2025-7-29 13:20:00