Quad 2-input NOR gate

General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input NOR function. Features and benefits ■ Input levels: ◆ For 74HC02: CMO

文件：100.08 Kbytes 页数：15 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74HC02; 74HCT02 is a quad 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power di

文件：265.75 Kbytes 页数：14 Pages

NEXPERIA

安世

Quad 2-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT02 provide the 2-input NOR function. FEATURES • Output capability: standard

文件：28.8 Kbytes 页数：5 Pages

PHI

飞利浦

Quad 2-input NOR gate

文件：132.68 Kbytes 页数：1 Pages

恩XP

Quad 2-input NOR gate

文件：132.68 Kbytes 页数：16 Pages

恩XP

Quad 2-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT02 provide the 2-input NOR function. FEATURES • Output capability: standard

文件：28.8 Kbytes 页数：5 Pages

PHI

飞利浦

Quad 2-input NOR gate

General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input NOR function. Features and benefits ■ Input levels: ◆ For 74HC02: CMO

文件：100.08 Kbytes 页数：15 Pages

恩XP

Quad 2-input NOR gate

文件：132.68 Kbytes 页数：1 Pages

恩XP

Quad 2-input NOR gate

文件：132.68 Kbytes 页数：16 Pages

恩XP

Quad 2-input NOR gate

文件：766.68 Kbytes 页数：15 Pages

NEXPERIA

安世