8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs The MC74HC595A consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also pro

文件：248.98 Kbytes 页数：12 Pages

ONSEMI

安森美半导体

8?묪it Serial?묲nput/Serial or Parallel?뭀utput Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

文件：160.83 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

8?묪it Serial?묲nput/Serial or Parallel.Output Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

文件：160.83 Kbytes 页数：13 Pages

ONSEMI

安森美半导体

8-bit Shift Register/Latch (with 3-state outputs)

Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-

文件：57.87 Kbytes 页数：10 Pages

HitachiHitachi Semiconductor

日立日立公司

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

文件：140.7 Kbytes 页数：28 Pages

PHI

飞利浦

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

General description The 74HC595; 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. Features and benefits ■ 8-bit serial input ■ 8-bit serial or parallel output ■ Storage registe

文件：374.02 Kbytes 页数：24 Pages

恩XP

8-bit shif t registers with 3-state output latches in bare die form

Description The 74HC595 is an 8–bit serial-in to parallel-out shift register which drives an 8–bit D–type latch with 3–state outputs. Both register and latch have independent positive triggered clock inputs. All registers capture data on rising edge and change output on the falling edge. If

文件：1.73143 Mbytes 页数：9 Pages

SS

8 BIT SHIFT REGISTER WITH OUTPUT LATCHES 3 STATE

DESCRIPTION The M54/74HC595 is a high speed CMOS 8-BIT SHIFT REGISTERS/OUTPUT LATCHES (3-STATE) fabricated in silicon C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device contains an 8-bit serial-in, parallel-out shift regist

文件：282.9 Kbytes 页数：13 Pages

STMICROELECTRONICS

意法半导体

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

文件：327.56 Kbytes 页数：21 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

8-Bit Shift Registers W ith Latched 3-State Output

文件：251.37 Kbytes 页数：8 Pages

WINGS

永盛电子