丝印：74HC573D；Package：SOIC20；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Octal D-Type Latch with 3-State Outputs General The 74HC573D is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power diss

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TOSHIBA

东芝

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

文件：61.23 Kbytes 页数：7 Pages

PHI

飞利浦

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

文件：279.1 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

文件：61.23 Kbytes 页数：7 Pages

PHI

飞利浦

Octal D-type transparent latch; 3-state

General description The 74HC573-Q100; 74HCT573-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Grad

文件：253.74 Kbytes 页数：19 Pages

恩XP

Octal D-type transparent latch; 3-state

1. General description The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

文件：274.77 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Octal D-type transparent latch; 3-state

文件：158.64 Kbytes 页数：21 Pages

恩XP

Octal D-type transparent latch; 3-state

The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresp • Input levels:• For 74HC573: CMOS level\n• For 74HCT573: TTL level\n\n• Inputs and outputs on opposite sides of package allowing easy interface with microprocessors\n• Useful as input or output port for microprocessors and microcomputers\n• 3-state non-inverting outputs for bus-oriented application;

Nexperia

安世

74HC CMOS logic IC series

Function：Octal D-Type Latch (3-State)\nNumber of Circuits：8\nRoHS Compatible Product(s) (#)：Available\nAssembly bases：日本\n Power Dissipation PD 500 mW \n;

Toshiba

东芝

Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 锁存器 描述：IC LATCH OCTAL D 3ST 20SOIC

Toshiba Semiconductor and Storage