74HC4040BQ

12-stage binary ripple counter

Generaldescription The74HC4040;74HCT4040arehigh-speedSi-gateCMOSdevicesandarepincompatiblewiththeHEF4040Bseries.TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC4040;74HCT4040are12-stagebinaryripplecounterswithaclockinput(CP),anoverridingasynchr

74HC4040BQ

12-stage binary ripple counter

1.Generaldescription The74HC4040;74HCT4040isa12-stagebinaryripplecounterwithaclockinput(CP),an overridingasynchronousmasterresetinput(MR)andtwelveparalleloutputs(Q0toQ11).The counteradvancesontheHIGH-to-LOWtransitionofCP.AHIGHonMRclearsallcounterstage

74HC4040BQ

12-stage binary ripple counter; • Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC4040: CMOS level\n• For 74HCT4040: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n;

The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n

74HC4040BQ-Q100

12-stage binary ripple counter; • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC4040-Q100: CMOS level\n• For 74HCT4040-Q100: TTL level\n\n• ESD protection:• MIL-STD-883, method 3015 exceeds 2000 V\n• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n• Multiple package options\n;

The 74HC4040-Q100; 74HCT4040-Q100 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74HC4040BQ-Q100

12-stage binary ripple counter

74HC4040BQ-Q100X

Package：16-VFQFN 裸露焊盘；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 计数器，除法器 描述：IC COUNTER 12ST BINARY 16DHVQFN

Nexperia USA Inc.

74HC4040BQX

Package：16-VFQFN 裸露焊盘；包装：管件 类别：集成电路（IC） 计数器，除法器 描述：IC BINARY COUNTER ASYNC 16DHVQFN

Nexperia USA Inc.