Octal D-type transparent latch; 3-state

1. General description The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

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Octal D-type transparent latch; 3-state

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Octal D-type transparent latch; 3-state

The 74HC373-Q100; 74HCT373-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.\n The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch featuring separate D-type inputs for each latch a • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC373-Q100: CMOS level\n• For 74HCT373-Q100: TTL level\n\n• 3-state non-inverting outputs for bus-oriented applications\n• Common 3-state out;

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Package：20-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 锁存器 描述：IC TRANSP LATCH OCT D 20TSSOP

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