Octal D-type transparent latch; 3-state

General description The 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC373; 74HCT373 is an octal D-type transparent latch featuring separate D-type inputs for each latch an

文件：179.49 Kbytes 页数：26 Pages

恩XP

Octal Transparent D-type Latches W ith 3-State Outputs

GENERAL DESCRIPTION 74HC373 is fabricated with high-speed silicon gate CMOS technology. It has the high noise immunity and low power consumption of standard CMOS integrated circuits. The eight latches in 74HC373 devices are transparent D-type latches. While the latch-enable (LE) input is high, th

文件：415.05 Kbytes 页数：6 Pages

WINGS

永盛电子

High Speed CMOS Logic

Features Output Drive Capability: 15 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS373.

文件：1.07908 Mbytes 页数：7 Pages

SS

Octal D-type transparent latch; 3-state

1. General description The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

文件：282.05 Kbytes 页数：16 Pages

NEXPERIA

安世

High Speed CMOS Logic

Features Output Drive Capability: 15 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS373.

文件：1.07908 Mbytes 页数：7 Pages

SS

Octal D-type transparent latch; 3-state

1. General description The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

文件：282.05 Kbytes 页数：16 Pages

NEXPERIA

安世

Octal D-type transparent latch; 3-state

General description The 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC373; 74HCT373 is an octal D-type transparent latch featuring separate D-type inputs for each latch an

文件：179.49 Kbytes 页数：26 Pages

恩XP

Octal D-type transparent latch; 3-state

1. General description The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

文件：277.39 Kbytes 页数：16 Pages

NEXPERIA

安世

Octal D-type transparent latch; 3-state

1. General description The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

文件：282.05 Kbytes 页数：16 Pages

NEXPERIA

安世

Octal D-type transparent latch; 3-state

General description The 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A. The 74HC373; 74HCT373 is an octal D-type transparent latch featuring separate D-type inputs for each latch an

文件：179.49 Kbytes 页数：26 Pages

恩XP