Dual non-inverting Schmitt trigger

General description The 74HC2G17; 74HCT2G17 is a high-speed Si-gate CMOS device. The 74HC2G17; 74HCT2G17 provides two non-inverting Schmitt trigger buffers. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Features ■ Wide supply v

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丝印：HV；Package：SOT457；Dual non-inverting Schmitt trigger

1. General description The 74HC2G17; 74HCT2G17 are dual buffers with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into shar

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Dual non-inverting Schmitt trigger

Features | « Operation voltage range: 2.0~6.0V « High noise immunity Balanced propagation delays « Low Power Consumption, 10-pA Max ICC | » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) ~1000-V Charged-Device Model (C101)

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丝印：HV；Package：SC-74；Dual non-inverting Schmitt trigger

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Dual non-inverting Schmitt-trigger

The 74HC2G17; 74HCT2G17 is a high-speed Si-gate CMOS device.\n The 74HC2G17; 74HCT2G17 provides two non-inverting Schmitt trigger buffers. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n The inputs switch at different points fo • Wide supply voltage range from 2.0 V to 6.0 V\n• Complies with JEDEC standard no. 7A\n• High noise immunity\n• ESD protection:• HBM JESD22-A114-D exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Low power dissipation\n• Balanced propagation delays\n• Unlimited input rise and fall times\n• Mul;

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Dual non-inverting Schmitt trigger

The 74HC2G17-Q100; 74HCT2G17-Q100 are dual buffers with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC2G17-Q100: CMOS level\n• For 74HCT2G17-Q100: TTL level\n\n• Complies with JEDEC standard no. 7A\n• High noise immunity\n• ESD protection:• MIL-;

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Package：SC-74，SOT-457；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 6TSOP

Nexperia USA Inc.

Package：SC-74，SOT-457；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 6TSOP

Nexperia USA Inc.