Dual buffer/line driver; 3-state

DESCRIPTION The 74HC2G/HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G/HCT2G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A LOW at pin OE causes the output as assume a high-impedance OFF-state

文件：91 Kbytes 页数：20 Pages

PHI

飞利浦

Dual buffer/line driver; 3-state

General description The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled by the output enable input pin nOE. A LOW at pin nOE causes the output to assume a hig

文件：98.66 Kbytes 页数：14 Pages

恩XP

Dual buffer/line driver; 3-state

Nexperia

安世

Dual buffer/line driver; 3-state

General description The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled by the output enable input pin nOE. A LOW at pin nOE causes the output to assume a hig

文件：98.66 Kbytes 页数：14 Pages

恩XP

Dual buffer/line driver; 3-state

DESCRIPTION The 74HC2G/HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G/HCT2G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A LOW at pin OE causes the output as assume a high-impedance OFF-state

文件：91 Kbytes 页数：20 Pages

PHI

飞利浦

Dual buffer/line driver; 3-state

General description The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled by the output enable input pin nOE. A LOW at pin nOE causes the output to assume a hig

文件：98.66 Kbytes 页数：14 Pages

恩XP

Dual buffer/line driver; 3-state

DESCRIPTION The 74HC2G/HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G/HCT2G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A LOW at pin OE causes the output as assume a high-impedance OFF-state

文件：91 Kbytes 页数：20 Pages

PHI

飞利浦

Dual buffer/line driver; 3-state

General description The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled by the output enable input pin nOE. A LOW at pin nOE causes the output to assume a hig

文件：98.66 Kbytes 页数：14 Pages

恩XP

Package：8-TSSOP，8-MSOP（0.118"，3.00mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUFFER NON-INVERT 6V 8TSSOP

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