Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the

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Octal D-type flip-flop with reset; positive-edge trigger

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Octal D-type flip-flop with reset; positive-edge trigger

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D‑type flip‑flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW‑to‑HIGH clock (CP) transition • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC273-Q100: CMOS level\n• For 74HCT273-Q100: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• C;

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Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 功能：主复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20SO

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