Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

文件：50.05 Kbytes 页数：7 Pages

PHI

飞利浦

Dual 4-input multiplexer; 3-state

General description The 74HC253; 74HCT253 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). Features and benefits ■ Non-inverting data path ■ 3-state outputs interface directly with system bus ■ Complies with JEDEC standard no. 7A ■ Common s

文件：164.34 Kbytes 页数：17 Pages

恩XP

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

文件：277 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

文件：277 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Dual 4-input multiplexer; 3-state

1. General description The 74HC253-Q100; 74HCT253-Q100 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on

文件：257.18 Kbytes 页数：15 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

文件：277 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Dual 4-input multiplexer; 3-state

General description The 74HC253; 74HCT253 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). Features and benefits ■ Non-inverting data path ■ 3-state outputs interface directly with system bus ■ Complies with JEDEC standard no. 7A ■ Common s

文件：164.34 Kbytes 页数：17 Pages

恩XP

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

文件：50.05 Kbytes 页数：7 Pages

PHI

飞利浦

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

文件：50.05 Kbytes 页数：7 Pages

PHI

飞利浦

Dual 4-input multiplexer; 3-state

General description The 74HC253; 74HCT253 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). Features and benefits ■ Non-inverting data path ■ 3-state outputs interface directly with system bus ■ Complies with JEDEC standard no. 7A ■ Common s

文件：164.34 Kbytes 页数：17 Pages

恩XP