NAND Gates

The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. • Complies with JEDEC standard JESD7A\n• Low-power dissipation\n• Input levels:• For 74HC20: CMOS level\n• For 74HCT20: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +80 °C and from -40 °C t;

Nexperia

安世

Package：14-SSOP（0.209"，5.30mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 2CH 4-INP 14SSOP

Nexperia USA Inc.

Package：14-SSOP（0.209"，5.30mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 2CH 4-INP 14SSOP

Nexperia USA Inc.

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I

文件：232.86 Kbytes 页数：9 Pages

STMICROELECTRONICS

意法半导体

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I

文件：172.7 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I

文件：172.7 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体