8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT166 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT166 are 8-bit shift registers which have a fully synchronous serial or parallel data entry

文件：93.18 Kbytes 页数：10 Pages

PHI

飞利浦

8-bit parallel-in/serial out shift register

1. General description The 74HC166; 74HCT166 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is loaded in

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NEXPERIA

安世

丝印：74HC166D；Package：SOIC16；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • 8-Bit Shift Register (P-IN, S-OUT) General The 74HC166D is a high speed CMOS 8-BIT PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS

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TOSHIBA

东芝

8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT166 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT166 are 8-bit shift registers which have a fully synchronous serial or parallel data entry

文件：93.18 Kbytes 页数：10 Pages

PHI

飞利浦

EVALUATION FIXTURE

FEATURES * STAND-ALONE CAPABILITY * FLEXIBLE CLOCK PROGRAMMING * USER-CONFIGURABLE A/D CONVERTER OPERATION * ANALOG BREADBOARD AREA * DIGITAL BREADBOARD AREA * FLEXIBLE REFERENCE VOLTAGE PROGRAMMING APPLICATIONS * DATA ACQUISTION * PERSONAL DIGITAL ASSISTANTS * 4- OR 5-WIRE RESISTIVE

文件：285.58 Kbytes 页数：13 Pages

BURR-BROWN

8-bit parallel-in/serial out shift register

1. General description The 74HC166; 74HCT166 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is loaded in

文件：278.96 Kbytes 页数：17 Pages

NEXPERIA

安世

8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT166 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT166 are 8-bit shift registers which have a fully synchronous serial or parallel data entry

文件：93.18 Kbytes 页数：10 Pages

PHI

飞利浦

8-bit parallel-in/serial out shift register

1. General description The 74HC166-Q100; 74HCT166-Q100 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is LOW, the data from D0 to D7 is

文件：277.82 Kbytes 页数：17 Pages

NEXPERIA

安世

8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT166 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT166 are 8-bit shift registers which have a fully synchronous serial or parallel data entry

文件：93.18 Kbytes 页数：10 Pages

PHI

飞利浦

8-bit parallel-in/serial-out shift register

GENERAL DESCRIPTION The 74HC/HCT166 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT166 are 8-bit shift registers which have a fully synchronous serial or parallel data entry

文件：93.18 Kbytes 页数：10 Pages

PHI

飞利浦