8-bit parallel-in/serial out shift register

1. General description The 74HC165-Q100; 74HCT165-Q100 are 8-bit serial or parallel-in/serial-out shift registers. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the d

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8-bit parallel-in/serial out shift register

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8-bit parallel-in/serial out shift register

The 74HC165-Q100; 74HCT165-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).\n The 74HC165-Q100; 74HCT165-Q100 are 8-bit parallel-load or serial-in shift registers with complementary serial outputs (Q7 and • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Asynchronous 8-bit parallel load\n• Synchronous serial input\n• Complies with JEDEC standard no. 7A\n• ESD protection:• MIL-STD-883, method 3015 exceeds 2000 V\n•;

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Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：并行或串行至串行 类别：集成电路（IC） 移位寄存器 描述：IC SHIFT REGISTER 8BIT 16TSSOP

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