Triple 3-input AND gate

GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES • Output capability: standard • ICC categor

文件：33.63 Kbytes 页数：5 Pages

PHI

飞利浦

Triple 3-input AND gate

General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. Features ■ Input levels: ◆ For 74HC11: CMOS level

文件：327.04 Kbytes 页数：15 Pages

恩XP

Triple 3-input AND gate

1. General description The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 to 6.0 V • CMOS low power di

文件：229.08 Kbytes 页数：11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Triple 3-input AND gate

General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function.

文件：352.4 Kbytes 页数：15 Pages

SYC

Triple 3-input AND gate

General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function. Features ■ Input levels: ◆ For 74HC11: CMOS level

文件：327.04 Kbytes 页数：15 Pages

恩XP

Triple 3-input AND gate

GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES • Output capability: standard • ICC categor

文件：33.63 Kbytes 页数：5 Pages

PHI

飞利浦

Triple 3-input AND gate

General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function.

文件：352.4 Kbytes 页数：15 Pages

SYC

Triple 3-input AND gate

1. General description The 74HC11-Q100; 74HCT11-Q100 is a triple 3-input AND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard

文件：228.76 Kbytes 页数：11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Triple 3-input AND gate

文件：693.09 Kbytes 页数：13 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Triple 3-input AND gate

The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. • Complies with JEDEC standard no. 7A:\n• Input levels:• For 74HC11: CMOS level\n• For 74HCT11: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +85 °C and from -40 °C to +125 °C;

Nexperia

安世