16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

DESCRIPTION The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. The 74AVC16374 consist of 2 sections of eight edge triggered flip-flops. A clock input (CP) and an output enable (OE) are provided

文件：84.89 Kbytes 页数：16 Pages

PHI

PHI

16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

1. General description The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. The 74AVC16374 consist of 2 sections of 8 edge-triggered flip-flops. A clock input (CP) and an output enable (OE) ar

文件：1.35673 Mbytes 页数：16 Pages

NEXPERIA

安世

16-bit edge triggered D-type flip-flop 3.6 V tolerant; 3-state

文件：772.95 Kbytes 页数：16 Pages

NEXPERIA

安世

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：369.23 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：369.23 Kbytes 页数：18 Pages

TI

德州仪器

16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. The 74AVC16374 consist of 2 sections of 8 edge-triggered flip-flops. A clock input (CP) and an output enable (OE) are provided per 8-bit section. • Wide supply voltage range from 1.2 V to 3.6 V\n• Complies with JEDEC standards:• JESD8-7 (1.2 V to 1.95 V)\n• JESD8-5 (1.8 V to 2.7 V)\n• JESD8-1A (2.7 V to 3.6 V)\n\n• CMOS low power consumption\n• Input/output tolerant up to 3.6 V\n• Dynamic Controlled Output (DCO) circuit dynamically changes ou;

Nexperia

安世

16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

The 74AVC16374-Q100 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. The 74AVC16374-Q100 consist of 2 sections of 8 edge-triggered flip-flops. A clock input (CP) and an output enable (OE) are provided per 8-bi • Automotive product qualification in accordance with AEC-Q100 (Grade 3)• Specified from -40 °C to +85 °C\n\n• Wide supply voltage range from 1.2 V to 3.6 V\n• Complies with JEDEC standards:• JESD8-7 (1.2 V to 1.95 V)\n• JESD8-5 (1.8 V to 2.7 V)\n• JESD8-1A (2.7 V to 3.6 V)\n\n• ESD protection:• MIL;

Nexperia

安世

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR）剪切带（CT） 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 8BIT 48TSSOP

Nexperia USA Inc.

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 8BIT 48TSSOP

Nexperia USA Inc.

Package：48-TFSOP（0.240"，6.10mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 8BIT 48TSSOP

Nexperia USA Inc.