丝印：a7；Package：SOT1115；Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

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Low-power configurable gate with voltage-level translator

The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer. All inputs can be connected to VCC or GND.\n This device ensures • Wide supply voltage range from 2.3 V to 3.6 V\n• High noise immunity\n• ESD protection:• HBM JESD22-A114F Class 3A exceeds 5000 V\n• MM JESD22-A115-A exceeds 200 V\n• CDM JESD22-C101E exceeds 1000 V\n\n• Low static power consumption; ICC = 1.5 μA (maximum)\n• Latch-up performance exceeds 100 mA pe;

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Package：6-XFDFN；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 转换器，电平移位器 描述：IC LP CONFIG GATE V-XLATR 6XSON

Nexperia USA Inc.

Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世

Low-power configurable gate with voltage-level translator

1. General description The 74AUP1T57 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected di

文件：265.73 Kbytes 页数：17 Pages

NEXPERIA

安世