16-bit transceiver/register with dual enable; 3-state

DESCRIPTION The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. FEATURES • In accordance with JE

文件：103.23 Kbytes 页数：20 Pages

PHI

飞利浦

16-bit transceiver/register with dual enable; 3-state

1. General description The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, Dtype flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the ‘A’ or ‘B’, or

文件：260.39 Kbytes 页数：18 Pages

NEXPERIA

安世

16-bit transceiver/register with dual enable; 3-state

The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.\n Data on the ‘A’ or ‘B’, or both buses, will be st • Wide supply voltage range of 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Current drive ±24 mA at VCC = 3.0 V.\n• MULTIBYTE flow-through standard pin-out architecture\n• Low inductance multiple VCC and GND pins for minimum noise and ground bounce\n• All data ;

Nexperia

安世

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

Nexperia USA Inc.

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

Nexperia USA Inc.

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

Nexperia USA Inc.