2.5V/3.3V 16-bit edge-triggered D-type flip-flop 3-State

DESCRIPTION The 74ALVCH16374 is a 16-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. Incorporates bus hold data inputs which eliminate the need for external pull-up or pull-down resistors to hold unused inputs. Th

文件：96.73 Kbytes 页数：12 Pages

PHI

PHI

2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

General description The 74ALVCH16374 is 16-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Incorporates bus hold data inputs which eliminate the need for external pull-up or pull-down resistors to hold unused inpu

文件：158.75 Kbytes 页数：17 Pages

恩XP

Low?뭋oltage 16?묪it D?뭈ype Flip?묯lop

The 74ALVCH16374 is an advanced performance, non−inverting 16−bit D−type flip−flop. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The VCXH16374 is byte controlled, with each byte functioning identically, but independently. Each byte has separate Out

文件：275.08 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

Low Voltage 16-Bit D-Type Flip-Flop with Bushold

General Description The ALVCH16374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and output enable (OE) are common to each byte and can be shorted together for full 16-bit o

文件：97.62 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The 74ALVCH16374 is a low voltage CMOS 16 BIT D-TYPE FLIP-FLOP with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V

文件：281.79 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Operates From 1.65 to 3.6 V · Max tpd of 4.2 ns at 3.3 V · ±24-mA Output Drive at 3.3 V · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ES

文件：486.5 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：318.27 Kbytes 页数：14 Pages

TI

德州仪器

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：318.27 Kbytes 页数：14 Pages

TI

德州仪器

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：318.27 Kbytes 页数：14 Pages

TI

德州仪器

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

文件：318.27 Kbytes 页数：14 Pages

TI

德州仪器