Low Voltage 16-Bit Buffer/Line Driver with Bushold

General Description The ALVCH16244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be s

文件：79.37 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

Low?뭋oltage 16?묪it Buffer

Low−Voltage 16−Bit Buffer with Bus Hold 1.8/2.5/3.3 V (3−State, Non−Inverting) The 74ALVCH16244 is an advanced performance, non−inverting 16−bit buffer. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. The 74ALVCH16244 is nibble controlled with each

文件：268.43 Kbytes 页数：10 Pages

ONSEMI

安森美半导体

2.5V/3.3V 16-bit buffer/line driver 3-State

DESCRIPTION The 74ALVC16244(74ALVCH16244) is a 16-bit non-inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the o

文件：84.99 Kbytes 页数：10 Pages

PHI

PHI

LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The 74ALVCH16244 is a low voltage CMOS 16 BIT BUS BUFFER (NON INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for bo

文件：224.78 Kbytes 页数：10 Pages

STMICROELECTRONICS

意法半导体

3.3V CMOS 16-Bit Buffer/Driver with 3-State Outputs and Bus-Hold

The 74ALVCH16244 16-bit buffer/driver is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The 74ALVCH16244 • Typical tSK(o) (Output Skew) < 250ps\n• ESD > 2000V per MIL-STD-883, Method 3015\n• > 200V using machine model (C = 200pF, R = 0)\n• VCC = 3.3V ± 0.3V, Normal Range\n• VCC = 2.7V to 3.6V, Extended Range\n• VCC = 2.5V ± 0.2V\n• CMOS power levels (0.4 uW typ. static)\n• Rail-to-Rail output swing for;

Renesas

瑞萨

2.5 V / 3.3 V 16-bit buffer/line driver; 3-state

1. General description The 74ALVC16244; 74ALVCH16244 is a 16-bit buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state o

文件：227.37 Kbytes 页数：13 Pages

NEXPERIA

安世

2.5V/3.3V 16-bit buffer/line driver 3-State

DESCRIPTION The 74ALVC16244(74ALVCH16244) is a 16-bit non-inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the o

文件：84.99 Kbytes 页数：10 Pages

PHI

PHI

丝印：ALVCH16244；Package：TSSOP；16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Operates From 1.65 V to 3.6 V · Max tpd of 3 ns at 3.3 V · ±24-mA Output Drive at 3.3 V · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ES

文件：491.19 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

FEATURES Member of the Texas Instruments Widebus™ Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection E

文件：496.15 Kbytes 页数：19 Pages

TI

德州仪器

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · Operates From 1.65 V to 3.6 V · Max tpd of 3 ns at 3.3 V · ±24-mA Output Drive at 3.3 V · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Latch-Up Performance Exceeds 250 mA Per JESD 17 · ES

文件：495.72 Kbytes 页数：19 Pages

TI

德州仪器