Octal D-type transparent latch; 3-state

1. General description The 74ALVC573 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable (LE) input and an outputs enable (OE) input are common to all latches. When pin LE is HIGH, data at t

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NEXPERIA

安世

Octal D-type transparent latch 3-state

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PHI

PHI

Octal D-type transparent latch; 3-state

文件：101.21 Kbytes 页数：17 Pages

恩XP

Octal D-type transparent latch; 3-state

The 74ALVC573 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable (LE) input and an outputs enable (OE) input are common to all latches.\n When pin LE is HIGH, data at the D-inputs (pins D0 to • Wide supply voltage range from 1.65 V to 3.6 V\n• 3.6 V tolerant inputs/outputs\n• CMOS low power consumption\n• Direct interface with TTL levels (2.7 V to 3.6 V)\n• Power-down mode\n• Latch-up performance exceeds 250 mA\n• Complies with JEDEC standards:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3;

Nexperia

安世

Package：20-VFQFN 裸露焊盘；包装：管件 类别：集成电路（IC） 锁存器 描述：IC OCTAL D TRANSP LATCH 20DHVQFN

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