Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs

General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d

文件：89.69 Kbytes 页数：5 Pages

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Quad 2-input AND gate

DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun

文件：87.3 Kbytes 页数：16 Pages

PHI

PHI

Quad 2-input AND gate

1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge

文件：234.11 Kbytes 页数：13 Pages

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Low Voltage Quad 2-Input AND Gate

文件：200.27 Kbytes 页数：6 Pages

ONSEMI

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低压四路2输入\与非\门（3.6V容许输入和输出电压）

ALVC08包含四个2输入AND门。 此产品设计用于I/O兼容性达到3.6V的低压（1.65V至3.6V）VCC应用。 ALVC08采用先进的CMOS技术制造，以在实现高速运行的同时保持CMOS低功耗。 •1.65V至3.6V VCC电源操作范围\n•3.6V容差输入和输出电压\n•tPD最长2.9 ns，3.0V到3.6V VCC最长3.2 ns，2.3V到2.7V VCC最长5.3 ns，1.65V到1.95V VCC\n•断电高阻抗输入和输出\n•使用专有Quiet Series™ 噪声/电磁干扰(EMI)消减电路\n•闩锁符合JEDEC JED78规定\n•静电放电(ESD)性能： 人体模型> 2000V 机械模型> 250V;

ONSEMI

安森美半导体

Quad 2-input AND gate

1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge

文件：234.11 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad 2-input AND gate

DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun

文件：87.3 Kbytes 页数：16 Pages

PHI

PHI

Quad 2-input AND gate

DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun

文件：87.3 Kbytes 页数：16 Pages

PHI

PHI

Quad 2-input AND gate

1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge

文件：234.11 Kbytes 页数：13 Pages

NEXPERIA

安世

Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs

General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d

文件：89.69 Kbytes 页数：5 Pages

FAIRCHILD

仙童半导体