Quad 2-input NOR gate

DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun

文件：85 Kbytes 页数：13 Pages

PHI

PHI

Quad 2-input NOR gate

1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con

文件：234.4 Kbytes 页数：13 Pages

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Quad 2-input NOR gate

1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con

文件：234.4 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad 2-input NOR gate

DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun

文件：85 Kbytes 页数：13 Pages

PHI

PHI

Quad 2-input NOR gate

DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun

文件：85 Kbytes 页数：13 Pages

PHI

PHI

Quad 2-input NOR gate

1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con

文件：234.4 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad 2-input NOR gate

DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun

文件：85 Kbytes 页数：13 Pages

PHI

PHI

Quad 2-input NOR gate

1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con

文件：234.4 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad 2-input NOR gate

The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.\n Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times.\n The 74ALVC02 provides the 2-input NOR function. • Wide supply voltage range from 1.65 V to 3.6 V\n• 3.6 V tolerant inputs/outputs\n• CMOS low power consumption\n• Direct interface with TTL levels (2.7 V to 3.6 V)\n• Power-down mode\n• Latch-up performance exceeds 250 mA\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 ;

Nexperia

安世

Quad 2-input NOR gate

The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.\n Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times.\n The 74ALVC02 provides the 2-input NOR function. • Wide supply voltage range from 1.65 V to 3.6 V\n• 3.6 V tolerant inputs/outputs\n• CMOS low power consumption\n• Direct interface with TTL levels (2.7 V to 3.6 V)\n• Power-down mode\n• Latch-up performance exceeds 250 mA\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 ;

Nexperia

安世