Dual D-type flip-flop with set and reset; positive-edge trigger

The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC74-Q100; 74AHCT74-Q100 is a dual positive-edge triggered, D-type flip-flop with individual data inpu • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC74-Q100: CMOS level\n•;

Nexperia

安世

Dual D-type flip-flop with set and reset positive-edge trigger

General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gra

文件：752.8 Kbytes 页数：19 Pages

NEXPERIA

安世

Package：14-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE DUAL 1BIT 14SO

Nexperia USA Inc.

TSSOP-48

TI

德州仪器

上传：深圳市豪迈兴电子有限公司

96-LFBGA

TexasInstruments

上传：深圳市宏捷佳电子科技有限公司