3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A

文件：84.13 Kbytes 页数：16 Pages

PHI

飞利浦

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary we

文件：260.86 Kbytes 页数：15 Pages

NEXPERIA

安世

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A

文件：84.13 Kbytes 页数：16 Pages

PHI

飞利浦

Automotive product qualification in accordance with AEC-Q100

文件：718.24 Kbytes 页数：17 Pages

NEXPERIA

安世

3-to-8 line decoder/demultiplexer; inverting

The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.\n The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A • Balanced propagation delays\n• All inputs have Schmitt-trigger action\n• Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• Inputs accepts voltages higher than VCC\n• For 74AHC138 only: operates with CMOS input levels\n• For 74AHCT138 ;

Nexperia

安世

3-to-8 line decoder/demultiplexer; inverting

The 74AHC138-Q100; 74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.\n The 74AHC138-Q100; 74AHCT138-Q100 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weight • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger action\n• Demultiplexing capability\n• Multiple input enable for easy expansion\n• Ideal for memory;

Nexperia

安世

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16TSSOP

Nexperia USA Inc.