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74AHC377PW

Octal D-type flip-flop with data enable; positive-edge trigger

DESCRIPTION The 74AHC/AHCT377 D-type flip-flops are high-speed silicon-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT377 devices have eight edge-triggered, D-type flip-flops with individual

文件:101.48 Kbytes 页数:20 Pages

PHI

PHI

PHI

74AHC377PW

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs

文件:601.79 Kbytes 页数:16 Pages

NEXPERIA

安世

74AHC377PW

Octal D-type flip-flop with data enable; positive-edge trigger

文件:100.98 Kbytes 页数:16 Pages

恩XP

恩XP

74AHC377PW-Q100

Octal D-type flip-flop with data enable; positive-edge trigger

文件:744.74 Kbytes 页数:17 Pages

NEXPERIA

安世

74AHC377PW

Octal D-type flip-flop with data enable; positive-edge trigger

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common • Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Ideal for addressable register applications\n• Data enable for address and data synchronization\n• Eight positive-edge triggered D-type flip-flops\n• Input levels:• For 74AHC377: CMO;

Nexperia

安世

74AHC377PW-Q100

Octal D-type flip-flop with data enable; positive-edge trigger

The 74AHC377-Q100; 74AHCT377-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC377-Q100; 74AHCT377-Q100 has eight edge-triggered, D-type flip-flops with individual D inputs and Q out • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Ideal for addressable register applications\n•;

Nexperia

安世

74AHC377PW,112

Package:20-TSSOP(0.173",4.40mm 宽);包装:卷带(TR) 功能:标准 类别:集成电路(IC) 触发器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

74AHC377PW,118

Package:20-TSSOP(0.173",4.40mm 宽);包装:卷带(TR) 功能:标准 类别:集成电路(IC) 触发器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

74AHC377PW-Q100J

Package:20-TSSOP(0.173",4.40mm 宽);包装:卷带(TR)剪切带(CT) 功能:标准 类别:集成电路(IC) 触发器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Nexperia USA Inc.

技术参数

  • Product status:

    Production

  • V_CC (V):

    2.0 - 5.5

  • Logic switching levels:

    CMOS

  • Output drive capability (mA):

    +/- 8

  • t_pd (ns):

    3.9

  • f_max (MHz):

    175

  • Power dissipation considerations:

    low

  • T_amb (Cel):

    -40~125

  • R_th(j-a) (K/W):

    100

  • Ψ_th(j-top) (K/W):

    4.6

  • R_th(j-c) (K/W):

    44.8

  • Package name:

    TSSOP20

供应商型号品牌批号封装库存备注价格
恩XP
24+
标准封装
37048
全新原装正品/价格优惠/质量保障
询价
NEXPERIA/安世
25+
SOT360-1
600000
NEXPERIA/安世全新特价74AHC377PW即刻询购立享优惠#长期有排单订
询价
NEXPERIA/安世
2447
SMD
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
询价
恩XP
23+
20-TSSOP
50000
全新原装正品现货,支持订货
询价
恩XP
22+
20TSSOP
9000
原厂渠道,现货配单
询价
恩XP
21+
6000
只做原装正品,卖元器件不赚钱交个朋友
询价
恩XP
23+
标准封装
6000
正规渠道,只有原装!
询价
恩XP
NA
8560
一级代理 原装正品假一罚十价格优势长期供货
询价
NEXPERIA/安世
22+
SOT360-1
10990
原装正品
询价
恩XP
2023+
TSSOP
32652
一级代理优势现货,全新正品直营店
询价
更多74AHC377PW供应商 更新时间2026-1-30 23:00:00