Octal D-type flip-flop; positive edge-trigger; 3-state

DESCRIPTION The 74AHC/AHCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

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Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separate D-type inputs f

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Octal D-type flip-flop; positive edge-trigger; 3-state

DESCRIPTION The 74AHC/AHCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：93.09 Kbytes 页数：20 Pages

PHI

PHI

Octal D-type flip-flop; positive edge-trigger; 3-state

文件：815.85 Kbytes 页数：18 Pages

NEXPERIA

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Octal D-type flip-flop; positive-edge trigger; 3-state

The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-s • Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Common 3-state output enable input\n• Input levels:• For 74AHC374: CMOS level\n• For 74AHCT374: TTL level\n\n• ESD protection:• HBM EIA/JESD22-A114E exceeds 2000 V\n• MM EIA/JESD22-A;

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Octal D-type flip-flop; positive-edge trigger; 3-state

The 74AHC374-Q100; 74AHCT374-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC374-Q100; 74AHCT374-Q100 comprises eight D-type flip-flops featuring separate D-type inputs for ea • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Common 3-state output enable input\n• Input le;

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Package：20-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.