Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

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Quad 2-input NAND Schmitt trigger

1. General description The 74AHC132; 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V t

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Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of tr

文件：106.13 Kbytes 页数：16 Pages

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Quad 2-input NAND Schmitt trigger

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Quad 2-input NAND Schmitt trigger

The 74AHC132-Q100; 74AHCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC132-Q100; 74AHCT132-Q100 contains four 2‑input NAND gates which accept standard input signals. The • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Balanced propagation delays\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC132-Q100: CMOS level\n• For 74AHCT132-Q100: TTL level\n\n• ESD protec;

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Package：14-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14TSSOP

Nexperia USA Inc.

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14TSSOP

Nexperia USA Inc.

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 4CH 2-INP 14TSSOP

Nexperia USA Inc.