Quad 2-input AND gate

DESCRIPTION The 74AHC/AHCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

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飞利浦

Quad 2-input AND gate

General description The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC08; 74AHCT08 provides the quad 2-input AND function. Features ■ Balanced propagation d

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恩XP

Quad 2-input AND gate

1. General description The 74AHC08; 74AHCT08 are quad 2-input AND gates. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V to 5.5 V • Input levels: • For

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NEXPERIA

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Quad 2-input AND gate Rev. 03 ??14 November 2007

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恩XP

Quad 2-input AND gate Rev. 03 ??14 November 2007

文件：91.85 Kbytes 页数：14 Pages

恩XP

Quad 2-input AND gate

DESCRIPTION The 74AHC/AHCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：73.99 Kbytes 页数：16 Pages

PHI

飞利浦

Automotive product qualification in accordance with AEC-Q100

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NEXPERIA

安世

Quad 2-input AND gate

The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A.\n The 74AHC08; 74AHCT08 provides the quad 2-input AND function. • Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accepts voltages higher than VCC\n• For 74AHC08 only: operates with CMOS input levels\n• For 74AHCT08 only: operates with TTL input levels\n• ESD protection:• HBM JESD22-A114E exceeds 2000 V\n• MM JESD22-A115-A excee;

Nexperia

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Quad 2-input AND gate

The 74AHC08-Q100; 74AHCT08-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A.\n The 74AHC08-Q100; 74AHCT08-Q100 provides the quad 2-input AND function.\n This product has been qualifi • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• For 74AHC08-Q100 only: operates with CMOS inp;

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Package：14-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 描述：IC GATE AND 4CH 2-INP 14TSSOP

Nexperia USA Inc.