16-Bit Transparent Latch with 3-STATE Outputs

General Description The ACT16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is low, the data that meets the setu

文件：88.79 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

16-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS (NON INVERTED)

DESCRIPTION The 74ACT16373 is an advanced high-speed CMOS 16-BIT D-TYPE LATCH (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. This device is designed to interface directly High Speed CMOS systems with TTL and NMOS components. All inputs and outpu

文件：277.93 Kbytes 页数：10 Pages

STMICROELECTRONICS

意法半导体

16-BIT D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS (NON INVERTED)

DESCRIPTION The 74ACT16374 is an advanced high-speed CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. This 16 bit D-Type Flip-Flop is controlled by two clock inputs (CK) and two output enable inputs (OE). The device can

文件：278.72 Kbytes 页数：10 Pages

STMICROELECTRONICS

意法半导体

16-Bit D-Type Flip-Flop with 3-STATE Outputs

General Description The ACT16374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit ope

文件：94.44 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 页数：11 Pages

TI

德州仪器

丝印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 页数：11 Pages

TI

德州仪器

丝印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 页数：11 Pages

TI

德州仪器

丝印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 页数：11 Pages

TI

德州仪器

丝印：ACT16374；Package：SSOP；16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus-Driving True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted C

文件：271.63 Kbytes 页数：11 Pages

TI

德州仪器

16-Bit D-Type Flip-Flop with 3-STATE Outputs

General Description The ACT16374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit ope

文件：94.44 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体