丝印：74ACT11032N；Package：PDIP；QUADRUPLE 2-INPUT POSITIVE-OR GATES

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages (D), Plastic Shrink Small

文件：326.91 Kbytes 页数：12 Pages

TI

德州仪器

丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

Quad 2-I nput NAND Gates with LSTTL compatible inputs in bare die form

Description The 54ACT00 quad 2-input NAND gates is fabricated on a 1.5μm advanced CMOS process combining high speed LSTTL performance with CMOS low power. The device consists of x4 independent 2-input NAND gates performing the Boolean function Y = A • B or Y = A + B. Internal circuitry compr

文件：407.2 Kbytes 页数：5 Pages

SS

Advanced CMOS TTL Input

Features:  Inputs directly accept TTL  Outputs directly interface CMOS, NMOS and TTL  Outputs Source/Sink 24 mA  Low Input Current: 1μA  Functionally compatible with bipolar 74LS00  Performance improvement versus 74HCT00  Lower power alternative to bipolar logic.

文件：378.3 Kbytes 页数：5 Pages

SS

Advanced CMOS TTL Input

Features:  Inputs directly accept TTL  Outputs directly interface CMOS, NMOS and TTL  Outputs Source/Sink 24 mA  Low Input Current: 1μA  Lower power alternative to bipolar logic  Functionally compatible with bipolar 74LS00  Upgrade for 74HCT00.

文件：369.15 Kbytes 页数：5 Pages

SS

QUAD 2-INPUT NAND GATE

DESCRIPTION The ACT00 is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. ■ HIGH SPEED: tPD

文件：67.27 Kbytes 页数：7 Pages

STMICROELECTRONICS

意法半导体

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：104.3 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：307.36 Kbytes 页数：10 Pages

Fairchild

仙童半导体

Quad 2-Input NAND Gate

General Description The AC/ACT00 contains four 2-input NAND gates. Features ■ICCreduced by 50 ■Outputs source/sink 24 mA ■ACT00 has TTL-compatible inputs

文件：307.36 Kbytes 页数：10 Pages

Fairchild

仙童半导体