丝印：6C596；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器

丝印：6C596；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器

丝印：6C596；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器

丝印：6C596；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器

丝印：6C596Q；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器

丝印：6C596Q；Package：SOIC；TPIC6C596 Power Logic 8-Bit Shift Register

1 Features 1• Low RDS(on), 7 Ω (Typical) • Avalanche Energy, 30 mJ • Eight Power DMOS Transistor Outputs of 100-mA Continuous Current • 250-mA Current Limit Capability • ESD Protection, 2500 V • Output Clamp Voltage, 33 V • Enhanced Cascading for Multiple Stages • All Registers Cleared Wi

文件：757.02 Kbytes 页数：31 Pages

TI

德州仪器